IEEE Std 1012:1998 pdf free download

IEEE Std 1012:1998 pdf free download.IEEE Standard for Software Verification and Validation.
3.1.5 criticality analysis: A structured evaluation of the software characteristics (e.g., safety, security, complexity. performance) for severity of impact of system failure, system degradation, or failure to meet software requirements or system objectives.
3.L6 hazard: See Annex I.
3.1.7 hazard analysis: A systematic qualitative or quantitative evaluation of software for undesirable outcomes resulting from the development or operation of a system. These outcomes may include injury. illness. death, mission failure, economic loss, property loss, environmental loss, or adverse social impact. This evaluation may include screening or analysis methods to categorize, eliminate, reduce, or mitigate hazards.
3,1.8 hazard identification: See Annex I.
3.1.9 independent erIffration and alidatIon (I&V): V&V processes performed by an organization with a specified degree of technical. managerial, and financial independence from the dcv elopmenc organiza
3.1.10 integration testing: An orderly progression of testing of incremental pieces of the software program in which software elements, hardware elements, or both are combined and tested until the entire system has been integrated to show compliance with the program design, and capabilities and requirements of the system,
3.1.11 integrity level: See Annex I.
3.1.12 interface design document (11)1)): Documentation that describes the architecture and design of interfaces between sslCIn and components. These descriptions include control algorithms, protocols, data contents and formats, and performance.
3.1.13 interface requirement specification URS): Documentation that specifies requirements for interfaces between systems or components. These requirements include constraints on firmats and timing.
3.1.14 life cycle prucess: A set of interrelated activities that result in the development or assessment of software products. Each activity consists of tasks. The life cycle processes may overlap one another. For V&V purposes, no process is concluded until its development products arc verified and validated according to the defined tasks in the SVVP.
3.1.15 minimum tasks: Those V&V tasks required for the software integrity level assigned to the software to be verified and validated.
3.1.16 optional tasks: Those V&V tasks that may be added to the minimum V&V tasks to address specific application requirements.
3.1.17 required inputs: The set of items necessary to perlbrm the minimum V&V tasks mandated within any life cycle activity.
3.1.18 required outputs: The set of items produced as a result of performing the minimum V&V tasks mandated within any life cycle activity.