IEC 60749-37:2008 pdf free download

IEC 60749-37:2008 pdf free download Semiconductor devices – Mechanical and climatic test methods – Part 37: Board level drop test method using an accelerometer
4.2 Test components This standard covers all area arrays and perimeter-leaded surface-mountable packaged semiconductor devices such as ball grid arrays (BGA), land grid arrays (LGA), chip scale packages (CSP), thin small outline packages (TSOP) and quad flat no-lead packages (QFN) typically used in handheld electronic product. All components used for this testing must be daisy-chained. The daisy chain should either be made at the die level or by providing daisy chain links at the lead-frame or substrate level. In case of non-daisy chain die, a mechanical dummy die shall be used inside the package to simulate the actual structure of the package. The die size and thickness should be similar to the functional die size to be used in application. The component materials, dimensions and assembly processes shall be representative of typical production device.
4.3 Test board Since the drop test performance is a function of the test board used for evaluation, this standard describes a preferred test board construction, dimensions, and material that is representative of those used in handheld electronic products. If another board construction/material better represents a specific application, the test board construction, dimensions and material should be documented. The test data generated using such a board shall be correlated at least once by generating the same data on the same component using the preferred board defined in this document (see Annex A for recommendations).
4.4 Test board assembly Prior to board assembly, all devices shall be inspected for missing balls or bent leads. Board thickness, warpage and pad sizes shall also be measured using a sampling plan. A visual inspection shall be performed on all boards for solder mask registration, contamination and daisy chain connection. It is recommended that boards should be inspected and accepted in accordance with a relevant national or international standard. One board shall also be used to measure the mechanical properties (modulus and glass transition temperature, T g ) of the board at the component location using dynamic mechanical analysis (DMA) and thermomechanical analysis (TMA) methods. It is highly recommended that the coefficient of thermal expansion (CTE) of the board be also measured in X, Y and Z direction. The mechanical property measurements are not required for every board lot, unless the fabrication process, material or vendor is changed from lot to lot.
The components shall be baked according to IEC 60749-20 and the future IEC 60749-20-1 prior to board assembly. The test boards shall be assembled using best known methods of printed circuit assembly process, representative of production methods. At least one board shall be used to adjust the board mounting process such as paste printing, placement and reflow profile. All assemblies shall be single-sided only, unless the component is anticipated for use in mirror-sided board assemblies. In that case, the components shall be mounted on each side of the board.